(1) Field of the Invention
This invention relates to a thermopile-type infrared sensor and a process for producing the same and, more specifically, to a thermopile-type infrared sensor that increases a S/N ratio by improving a thermopile pattern structure thereof and a process for producing the same, which enhances production yield thereof.
(2) Description of the Related Art
In general, a thermal equilibrium equation for a thermal infrared sensor is expressed as follows:
Cxc2x7xcex4T/dt+Gxc2x7xcex4T=Wxe2x80x83xe2x80x83(1)
where, C is a heat capacity, xcex4T is a temperature change of a light-receiving part, G is a thermal conductance between the light-receiving part and the surroundings, and W is light-receiving power. When the light-receiving power W varies according to an equation W=W0 exp(jxcfx89t), xcex4T is expressed as follows:
|xcex4T|=W0/G(1+xcfx842xcfx892)xc2xdxe2x80x83xe2x80x83(2)
wherein a thermal time constant xcfx84 is expressed as follows:
xcfx84xe2x89xa1C/Gxe2x80x83xe2x80x83(3)
Accordingly, in order to increase a response rate of a thermal infrared sensor (i.e. to decrease thermal time constant xcfx84), heat capacity C is needed to be decreased and thermal conductance G is needed to be increased. However, an increase in G causes temperature change of light-receiving part xcex4T to decrease with respect to the same light-receiving power and sensitivity to deteriorate. Therefore, in order to improve sensitivity and response rate of a thermal infrared sensor, G is needed to be small and C is needed to be decreased. From this point of view, a heat-sensitive part, in which a hot junction is placed, is constructed to have a membrane structure of several microns thickness so that the heat capacity C and thermal conductance G in relation to a substrate decrease, resulting in improvement in sensitivity and response rate of a thermopile-type thermal infrared sensor.
A figure of merit Z for a thermoelectric element such as a thermopile is expressed as follows:
Z=xcex12xc2x7"sgr"/xcexxe2x88x9dm*{fraction (3/2)}(xcexc/xcexL)xe2x80x83xe2x80x83(4)
where, xcex1 is the Seebeck coefficient, a electrical conductivity, xcexL is thermal conductivity, m* is effective mass, xcexc is mobility of carrier, and xcexL is thermal conductivity of lattice.
Accordingly, in order to improve electrical characteristics of a thermoelectric element, Seebeck coefficient xcex1 and electrical conductivity a are needed to be increased while thermal conductivity xcex is needed to be decreased. Therefore, a semiconductive material having a large figure of merit Z compared to metal is employed as a thermoelectric material.
On the other hand, a Seebeck coefficient xcex1 of n-type silicon as a thermoelectric material is expressed as follows:
xcex1=(VF/T+2k/q)xe2x80x83xe2x80x83(5)
wherein VF is energy difference between a bottom of conduction band and Fermi level, T is absolute temperature, k is the Boltzmann""s constant, and q
is electron charge.
The relation between VF and electrical conductivity "sgr" is expressed as follows:
"sgr"=qxc2x7nxe2x80x83xe2x80x83(6)
where, n is number of carriers and xcexc mobility of carrier.
n=Nc/exp(VF/kT)xe2x80x83xe2x80x83(7)
wherein Nc is effective density of states (quoted from xe2x80x9csemiconductor devicexe2x80x9d written by S. M. Sze).
Consequently, electrical conductivity is expressed as follows:
"sgr"=qxc2x7Ncxc2x7xcexc/exp(VF/kT)xe2x80x83xe2x80x83(8)
According to equation (8), there is a trade-off relation between a and "sgr". That is, when VF is increased for attempting to increase Seebeck coefficient xcex1, the number of carriers n is decreased, causing "sgr" to decrease. Thermal conductivity xcex of single crystalline silicon markedly depends upon thermal conductivity of lattice, which is very high because silicon atoms are bonded by covalent bonding with each other. Thermal conductivity of lattice decreases with decreasing crystallinity of a crystal such as polycrystalline silicone, in which xcexc also decreases, causing a to decrease. Consequently, performance parameters of thermoelectric material are parameters such as impurity concentration, crystallinity, size of thermoelectric element, and number of thermopiles, for which the most suitable design is required.
As a conventional example No. 1 of a thermopile, a thermopile attempted to be highly sensitive, produced by a process containing: laminating thin films of SiO2 and SiN on a single crystalline silicon substrate by using semiconductor photolithography processing technology; employing a combination of p-type polycrystalline silicon-Au/Cr and n-type polycrystalline silicon-Au/Cr as a thermoelectric material; and forming hollow portions by anisotropic etching of the substrate using Ethylene Diamine Pyrocatechol (EDP) so as to allow a heat-sensitive part to have a membrane structure, is reported (xe2x80x9cA Silicon-Thermopile-Based Infrared Sensing Array for Use in Automated Manufacturingxe2x80x9d, IEEE Trans. Electron Devices, vol. ED-33 No. 1, pp 72-79, 1986).
In FIG. 21, there is shown a conventional example No. 2 of a thermopile attempted to be highly sensitive, which is disclosed in Japanese Patent Application Laid-Open No. H3-191834. This thermopile is produced by a process containing the steps of: forming an epitaxial layer 21 on a single crystalline silicon substrate 20; forming a thermopile material of p-type diffusion layers 22 in the epitaxial layer 21; forming a thermopile material of n-type polycrystalline silicon layers 24 thereon through an insertion of insulator 23; and connecting with the polycrystalline silicon layers 24 by forming an aluminum layer 25, thereby constructing a multiple layers-thermopile structure consisting of single crystalline silicon-aluminum-polycrystalline silicon. This is a thermopile, in which multiple layers of thermopile material are constructed so as to increase the number of thermopiles per unit area, thereby attempting to achieve high output and chip size miniaturization.
However, the above conventional thermopiles have problems as explained in the following. In the conventional example No. 1 of thermopile, thin films of SiO2 and SiN are laminated on a single crystalline silicon substrate, and Au/Cr and polycrystalline silicon having a large Seebeck coefficient are employed as thermoelectric material. Since Au has high thermal conductivity, dissipating of absorbed heat is large, resulting in an insufficient ratio of temperature rise at the light-receiving part. Accordingly, the problem is that sufficient temperature rise cannot be obtained.
Further, a p-type polycrystalline silicon is used as a thermoelectric material, in which the majority carrier, i.e. hole has low mobility, causing high electrical resistivity. Consequently, S/N ratio, i.e. ratio of output voltage to Johnson noise becomes low, causing the thermopile to have inferior accuracy when used as a noncontacting temperature sensor. Further, since a pattern of polycrystalline silicon thermoelectric material is not arranged over a whole thin membrane part, bends and cracks are easily occurred in the film upon an anisotropic etching, causing a problem of deterioration in the yield.
On the other hand, the conventional example No. 2 of thermopile has tried to solve the above problem of the conventional example No. 1 and also to achieve higher sensitivity. Single crystalline and polycrystalline silicon are employed as the thermoelectric material, each of which is formed as a p-type and n-type semiconductor, respectively, and then, electromotive force polarity of which is set up to be reverse with each other, attempting to achieve higher sensitivity. However, since the thermopile employs a p-type diffusion layer formed on a surface of single crystalline silicon substrate as one of the thermoelectric materials thereof, it has been needed to leave a single crystalline silicon and an epitaxial layer having thickness of 5 xcexcm or over including a thickness of the p-type diffusion layer.
Seebeck coefficient of single crystalline silicon can be enlarged by controlling impurity concentration and thermal conductivity thereof is higher compared to the other materials. Consequently, even if a thickness thereof is thin as small as 10 xcexcm, a thermal insulation between a hot junction in a heat-sensitive part consisting of an absorbing film and a cold junction formed on the substrate is inferior, causing insufficient temperature rise per unit of infrared incident power at the heat-sensitive part, resulting in that the output voltage becomes low.
Further, even if the p-type and n-type polycrystalline silicon are employed as the thermoelectric material so as to increase an apparent electromotive force, a hole that is a majority carrier in the p-type polycrystalline silicon layer has high resistivity caused by low mobility compared to that of an electron, resulting in a low S/N ratio, i.e. low ratio of output voltage to Johnson noise compared to that of n-type silicon, and causing the thermopile to have inferior accuracy when used as a noncontacting temperature sensor as well as the conventional example No. 1.
Furthermore, since a pattern of polycrystalline silicon is not arranged over a whole thin film membrane part, a crack is easily occurred in the film caused by concentration of stress upon an anisotropic etching, causing a problem of deterioration in the yield. In addition, since a suitable control of the impurity concentration has not been disclosed, a sufficient S/N ratio cannot be obtained for use in the thermopile sensor.
It is therefore an object of the present invention to solve the above problems and to provide an inexpensive thermopile-type infrared sensor, in which the S/N ratio, i.e. ratio of output voltage to Johnson noise, is increased, a flat and rigid membrane structure is formed therein, and an absorption characteristic as well as a production yield thereof are improved, and to provide a process for producing such a thermopile-type infrared sensor.
In order to accomplish the above object, a first aspect of the present invention is to provide a thermopile-type infrared sensor, in which thermoelectric elements are formed on a single crystalline silicon substrate containing a cavity therein, comprising: a first dielectric film covering the cavity; a plurality of n-type polycrystalline silicon layers formed on the first dielectric film, extending radially from the vicinity of a chip center; and metal film layers formed in contact with the n-type polycrystalline silicon layers, wherein hot junctions are formed at the chip central side and cold junctions are formed at the chip peripheral side of the n-type polycrystalline silicon layers, respectively, by contacting the n-type polycrystalline silicon layer and the metal film layer, and at least one series of thermoelectric elements is formed on the first dielectric film by connecting alternately and successively, by the metal film layer, said hot junction and cold junction of the neighboring n-type polycrystalline silicon layer.
A second aspect of the present invention is to provide a thermopile-type infrared sensor, in which thermoelectric elements are formed on a single crystalline silicon substrate containing a cavity therein, comprising: a first dielectric film covering the cavity; a plurality of n-type polycrystalline silicon layers formed on the first dielectric film, extending radially from the vicinity of a chip center; and metal film layers formed in contact with the n-type polycrystalline silicon layers, wherein hot junctions are formed at the chip central side and cold junctions are formed at the chip peripheral side of the n-type polycrystalline silicon layers, respectively, by contacting the n-type polycrystalline silicon layer and the metal film layer, and at least one series of thermoelectric elements is formed on the first dielectric film by connecting alternately and successively, by the metal film layer, said hot junction and cold junction of the neighboring n-type polycrystalline silicon layer, and an infrared absorption film is formed on a dielectric film that covers said series of thermoelectric elements.
According to the first and second aspects of the present invention, thermoelectric elements are radially formed from the vicinity of a chip center with distributing uniformly on the dielectric film so as to make the thermoelectric elements to be heat stress-resistant, and many thermoelectric elements are formed on the dielectric film followed by forming a series of thermoelectric elements in which the thermoelectric elements are connected in series, thereby improving an infrared detection efficiency of the sensor. Thus, since the thermoelectric elements are radially formed on the dielectric film, many thermoelectric elements can be formed on one surface, thereby improving the detection efficiency of the sensor. Further, the infrared absorption film is formed on the dielectric film that covers the series of thermoelectric elements, thereby further improving the detection efficiency of the sensor.
A third aspect of the present invention is to provide a thermopile-type infrared sensor, in which thermoelectric elements are formed on a single crystalline silicon substrate containing a cavity therein, comprising: a first dielectric film covering the cavity; a plurality of n-type polycrystalline silicon layers formed on the first dielectric film, said silicon layers firstly extending radially from a circumference in the vicinity of a chip center and secondly from a plurality of outer concentric circles toward a chip periphery respectively and said formed silicon layers being situated to form a complementary pattern with each other; a second dielectric film covering the n-type polycrystalline silicon layers and the first dielectric film; contact holes formed in the second dielectric film; and metal film layers formed in contact with the n-type polycrystalline silicon layers through the contact hole, wherein hot junctions are formed at the chip central side and cold junctions are formed at the chip peripheral side of the n-type polycrystalline silicon layers, respectively, by contacting the n-type polycrystalline silicon layer and the metal film layer through the contact hole, and at least one series of thermoelectric elements is formed on the first dielectric film by connecting alternately and successively, by the metal film layer, said hot junction and cold junction of the neighboring n-type polycrystalline silicon layer, and an infrared absorption film is formed on a dielectric film that covers said series of thermoelectric elements.
A fourth aspect of the present invention is to provide a thermopile-type infrared sensor, in which thermoelectric elements are formed on a single crystalline silicon substrate containing a cavity therein, comprising: a first dielectric film covering the cavity formed in the single crystalline silicon substrate; a plurality of n-type polycrystalline silicon layers formed on the first dielectric film, said silicon layers firstly extending radially from a circumference in the vicinity of a chip center and secondly from a plurality of outer concentric circles toward a chip periphery respectively and said formed silicon layers being situated to form a complementary pattern with each other; a second dielectric film formed on the n-type polycrystalline silicon layers and the first dielectric film; contact holes formed in the second dielectric film; metal film layers formed in contact with the n-type polycrystalline silicon layers through the contact holes; hot and cold junctions formed at the chip central side and the chip peripheral side of a plurality of the n-type polycrystalline silicon layers, respectively, by contacting the metal film layer and the n-type polycrystalline silicon layer through the contact hole; a series of thermoelectric elements formed by connecting alternately and successively said hot junction and cold junction by the metal film layer; a third dielectric film formed on the second dielectric film and the metal film layers; an infrared absorption film formed on the third dielectric film so as to cover the hot junctions; and electrode pads formed at ends of the series of thermoelectric elements.
According to the third and fourth aspects of the present invention, the n-type polycrystalline silicon layer containing many carriers, i.e. electrons having higher mobility than that of holes of p-type silicon is used as a thermoelectric material. Impurity concentration, temperature upon formation of the polycrystalline silicon and the crystallinity are controlled, thereby decreasing the lattice thermal conductivity and suitably controlling the Seebeck coefficient "sgr", and conductivity "sgr". The n-type polycrystalline silicon is used as the thermoelectric material, allowing high mobility of electrons to be used and low electrical resistance to be obtained under the same Seebeck coefficient, thereby improving the S/N ratio, i.e. ratio of output voltage to Johnson noise. Further, a pattern layout of the n-type polycrystalline silicon layer is placed over a whole membrane part as a striped pattern and the hot junctions are formed on the three concentric circles of the radial striped pattern, thereby relaxing and dispersing stresses in the membrane part due to the polycrystalline silicon layer, and decreasing cracks and bends that occur at the membrane part, and improving a yield upon an anisotropic etching.
A fifth aspect of the present invention is to provide a thermopile-type infrared sensor, in which thermoelectric elements are formed on a single crystalline silicon substrate containing a cavity therein, comprising: a first dielectric film covering the cavity; a plurality of n-type polycrystalline silicon layers formed on the first dielectric film, said silicon layers firstly extending radially from a circumference in the vicinity of a chip center and secondly from a plurality of outer concentric circles toward a chip periphery respectively and said formed silicon layers being situated to form a complementary pattern with each other; metal film layers formed in contact with the n-type polycrystalline silicon layers; hot and cold junctions formed at the chip central side and the chip peripheral side of the n-type polycrystalline silicon layers, respectively, by contacting the n-type polycrystalline silicon layer and the metal film layer; a series of thermoelectric elements formed on the first dielectric film, in which the metal film layer connected with the hot junction extends on the first dielectric film and connects with the cold junction on a neighboring n-type polycrystalline silicon layer, thereby connecting the hot junction and the cold junction alternately and successively; and an infrared absorption film formed on a second dielectric film that covers the series of thermoelectric elements.
According to the fifth aspect of the present invention, the metal film layer that makes connection between the hot and cold junctions is formed on the first dielectric film, allowing to save the formation of a second dielectric film and contact holes formed therein, thereby reducing the man-hour.
A sixth aspect of the present invention is to provide a thermopile-type infrared sensor, in which thermoelectric elements are formed on a single crystalline silicon substrate containing a cavity therein, comprising: a first dielectric film covering the cavity; a plurality of first n-type polycrystalline silicon layers formed on the first dielectric film, said silicon layers firstly extending radially from a circumference in the vicinity of a chip center and secondly from a plurality of outer concentric circles toward a chip periphery respectively and said formed silicon layers being situated to form a complementary pattern with each other; a second dielectric film covering the first n-type polycrystalline silicon layers and the first dielectric film; a plurality of second n-type polycrystalline silicon layers formed on the second dielectric film, having the same pattern as a pattern of the first n-type polycrystalline silicon layers but shifted by half of a pitch toward the circumference of a chip; a third dielectric film covering the second n-type polycrystalline silicon layers; contact holes formed on the second and third dielectric films covering the first and second n-type polycrystalline silicon layers, respectively; metal film layers formed in contact with the first and second n-type polycrystalline silicon layers through the contact hole; hot and cold junctions formed at the chip central side and the chip peripheral side, respectively, of the first and second n-type polycrystalline silicon layers by contacting the first and second n-type polycrystalline silicon layers and the metal film layer through the contact hole; a series of thermoelectric elements formed by connecting alternately and successively said hot junction and cold junction of the neighboring n-type polycrystalline silicon layer by the metal film layer; and an infrared absorption film formed on a dielectric film that covers the series of thermoelectric elements.
According to the sixth aspect of the present invention, a pattern layout is formed to have double layers of the n-type polycrystalline silicon, enlarging an area of the n-type polycrystalline silicon layer, thereby reducing the resistivity thereof and improving the S/N ratio.
Preferably, a crystallographic plane of the single crystalline silicon substrate is (100), thereby providing an advantage to a formation of the cavity in the substrate by an anisotropic etching.
Preferably, the n-type polycrystalline silicon layers radially placed from a chip center have combination of fan-shaped patterns extending toward a chip periphery, thereby reducing a resistivity of the n-type polycrystalline silicon layers between the hot and cold junctions due to a wide width of a pattern of the n-type polycrystalline silicon layers and improving the S/N ratio of the thermopile elements. Further, since the n-type polycrystalline silicon layers are formed on a whole surface of the membrane, a stress-resistant structure of the thermopile elements is obtained.
Preferably, the hot junctions are placed on concentric circles of radius r1, r2 and r3 with respect to a chip center in a relation of r1 less than r2 less than r3, thereby reducing the resistivity of the n-type polycrystalline silicon layers composing each thermoelectric element and providing an infrared sensor having high S/N ratio since a part on the membrane to be heated by the incident infrared ray is circularly distributed around the chip center so as to generate the output voltage effectively.
Preferably, the infrared absorption film formed on the series of thermoelectric elements consists of one member selected from the group consisting of borosilicate glass, polyimide resin, vinyl resin and acrylic resin, thereby a dielectric film made by glass, such as borosilicate glass, is annealed and melted to reduce pin-holes. The borosilicate glass extends a wavelength region in which infrared ray is absorbed. In case of using resin, since an absorbency of the infrared ray is increased and the wavelength region in which infrared ray is absorbed is extended, a sensitivity of the infrared sensor can be improved.
Preferably, the dielectric film covering the series of thermoelectric elements consists of two layers of phosphosilicate glass and SiN, thereby relaxing a stress of the membrane part.
Preferably, the first dielectric film consists of two layers of SiO2 and SiN, or three layers consisting of a SiN layer sandwiched by SiO2 layers, thereby relaxing a stress of the membrane part. In addition, these layers serve as an etch-stop layer upon a formation of the cavity.
Preferably, peripheral portions of the n-type polycrystalline silicon layers are formed in a step-shape except portions on which the hot and cold junctions are formed, thereby solving a problem of step coverage and reducing a thickness of the metal film layer to be in contact with the polycrystalline silicon. Thus, a stress in the metal film layer is reduced, allowing formation of a flat membrane to be easily done and improving the yield.
Preferably, cross sections of periphery of the n-type polycrystalline silicon layers are in a tapered-shape, thereby solving the problem of step coverage. Thus, a disconnection of the metal film layer that makes connection between the hot and cold junctions does not occur and a thickness of the metal film layer can be reduced, thereby allowing formation of a flat membrane to be easily performed and improving the yield.
Preferably, a resistivity of the n-type polycrystalline silicon layers is 1 to 10 mxcexa9xc2x7cm, thereby the trade-off relationship between the Seebeck coefficient and the electrical resistivity can be suitably controlled. That is, when the resistivity of the n-type polycrystalline silicon layers is less than 1 mxcexa9xc2x7cm, the Seebeck coefficient becomes small causing a practical output voltage not to be obtained, and when more than 10 mxcexa9xc2x7cm, the Seebeck coefficient becomes large but a temperature coefficient of the Seebeck coefficient and Johnson noise also become large, causing the S/N ratio to decrease. Therefore, the resistivity of the n-type polycrystalline silicon layers is preferably 1 to 10 mxcexa9xc2x7cm.
Preferably, the dielectric film covering the series of thermoelectric elements contains at least one member selected from the group consisting of SiO2, SiN, SiNO, phosphosilicate glass, A12O3 and SIALON.
The passivation film consisting of a combination among SiO2, SiN, and SiNO is used, thereby relaxing a stress of the membrane part, improving an airtight property thereof and allowing a flat membrane to be formed. Further, at least one member selected from the group consisting of PSG, Al2O3 and SIALON is used followed by formation of the phosphosilicate glass, thereby relaxing a stress of the membrane part.
Preferably, the metal film layer consists of at least one member selected from the group consisting of Al, Cr, Ta, Mo, W and NiCr.
At least one member selected from the group consisting of Al, Cr, Ta, Mo, W, W-alloy and NiCr, which has low thermal conductivity and has good adherence with the SiO2 dielectric layer, is used as a material of the metal film layer to be in contact with the n-type polycrystalline silicon layers, thereby minimizing a dissipation of heat from the heat-sensitive part, increasing a temperature rise in the heat-sensitive part and contributing to the mass production.
Preferably, a surface of the infrared absorption film has a striped pattern having unevenness, thereby increasing the absorbency of the infrared ray by reducing the reflection of the infrared ray.
Preferably, the thermopile-type infrared sensor is enclosed in a package, a window consisting of an infrared-transmissible filter is mounted at an opening formed on a cap of the package, a shape of the window is quadrilateral or hexagonal, the opening fits with the window, and notches formed at each corner of the opening are placed outside compared to intersection points among each side of the quadrilateral or hexagonal.
Preferably, the thermopile-type infrared sensor is enclosed in a package, a window consisting of an infrared-transmissible filter is mounted at an opening formed on a cap of the package, a shape of the window is quadrilateral or hexagonal, the opening fits with the window, and hollows formed at each corner of the opening position and mount the window.
The shape of the window fits with that of the opening formed on the cap of the package, thereby the window is fitted to the opening to be fixed therein. Curved notches are formed in the opening at which corners of the window are fitted to so as to minimize a gap as small as possible. There is provided a hollow at each corner of the opening, and the window is fitted into the opening, abutting each corner of the window on the bottom of the hollow followed by gluing, thereby firmly fixing the window with the cap.
A seventh aspect of the present invention is to provide a process for producing a thermopile-type infrared sensor comprising the steps of: forming a first dielectric film on both sides of a single crystalline silicon substrate by thermal oxidation, chemical vapor deposition or sputtering; depositing a polycrystalline silicon layer on the first dielectric film by chemical vapor deposition or sputtering; forming a n-type polycrystalline silicon layer having resistivity of 1 to 10 mxcexa9xc2x7cm by diffusing impurities into the polycrystalline silicon layer; patterning the n-type polycrystalline silicon layer so as to have a set of patterns consisting of patterns radially extending in striped shape from a fan-shaped pattern formed between radii r1 and r2 around a chip center up to the vicinity of a periphery of the substrate, patterns radially extending in striped shape toward outside from r2 up to the vicinity of the periphery of the substrate, and patterns radially extending in striped shape toward outside from r3 up to the vicinity of the periphery of the substrate; forming a second dielectric film on a plurality of the patterned n-type polycrystalline silicon layers and the first dielectric film by chemical vapor deposition, glass coating or sputtering; forming contact holes on the second dielectric film at which hot and cold junctions to be formed; depositing a metal film layer by sputtering or vacuum evaporation after forming the contact holes; patterning the metal film layer, then making ohmic contact between the n-type polycrystalline silicon layers and the metal film layers at the contact holes and then, forming a series of thermoelectric elements by connecting each thermoelectric element consisting of a pair of hot and cold junctions in series; forming a third dielectric film on the metal film layers and on the second dielectric film and forming an infrared absorption film at the chip center; and forming an opening in the first dielectric film formed on the back of the single crystalline silicon substrate, followed by forming a cavity in the back of the single crystalline silicon substrate by etching and then, followed by exposing the first dielectric film from the back of the single crystalline silicon substrate.
An eighth aspect of the present invention is to provide a process for producing a thermopile-type infrared sensor comprising the steps of: forming a first dielectric film on both sides of a single crystalline silicon substrate by thermal oxidation, chemical vapor deposition or sputtering; depositing a polycrystalline silicon layer on the first dielectric film by chemical vapor deposition or sputtering; forming a n-type polycrystalline silicon layer having resistivity of 1 to 10 mxcexa9xc2x7cm by diffusing impurities into the polycrystalline silicon layer; patterning the n-type polycrystalline silicon layer so as to have a set of patterns consisting of patterns radially extending in striped shape from a fan-shaped pattern formed between radii r1 and r2 around a chip center up to the vicinity of a periphery of the substrate, patterns radially extending in striped shape toward outside from r2 up to the vicinity of the periphery of the substrate, and patterns radially extending in striped shape toward outside from r3 up to the vicinity of the periphery of the substrate, and then, a part of thus patterned n-type polycrystalline silicon layers is etched so as to have mesa shape; patterning by using a pattern that is larger than the pattern of said mesa shape n-type polycrystalline silicon layers but similar in shape, followed by etching with the exception of the n-type polycrystalline silicon layers situated near the periphery of said mesa shape n-type polycrystalline silicon layers, thereby forming a tapered and step-like shaped n-type polycrystalline silicon layers; forming a second dielectric film on said step-like shaped n-type polycrystalline silicon layers, then forming contact holes on the second dielectric film at which hot and cold junctions to be formed; forming a metal film layer by sputtering or vacuum evaporation; patterning the metal film layer, then making ohmic contact between said step-like shaped n-type polycrystalline silicon layers and the metal film layers at the contact holes and then, forming a series of thermoelectric elements by connecting each thermoelectric element consisting of a pair of hot and cold junctions in series; forming a third dielectric film on the metal film layers and the second dielectric film, then forming an infrared absorption film on the third dielectric film; and forming a cavity in the back of the single crystalline silicon substrate, then exposing the first dielectric film from the back of the single crystalline silicon substrate.
A ninth aspect of the present invention is to provide a process for producing a thermopile-type infrared sensor comprising the steps of: forming a first dielectric film on both sides of a single crystalline silicon substrate by thermal oxidation, chemical vapor deposition or sputtering; depositing a first polycrystalline silicon layer on the first dielectric film by chemical vapor deposition or sputtering; patterning the first polycrystalline silicon layer so as to have a first pattern consisting of patterns radially extending in striped shape from a fan-shaped pattern formed between radii r1 and r2 around a chip center up to the vicinity of a periphery of the substrate, patterns radially extending in striped shape toward outside from r2 up to the vicinity of the periphery of the substrate, and patterns radially extending in striped shape toward outside from r3 up to the vicinity of the periphery of the substrate, then depositing a second polycrystalline silicon layer and then, forming a first n-type polycrystalline silicon layer having said first pattern and a second n-type polycrystalline silicon layer, both having resistivity of 1 to 10 mxcexa9xc2x7cm, by doping impurities; patterning the second n-type polycrystalline silicon layer by using a second pattern that is larger than said first pattern but similar in shape, thereby forming the periphery of n-type polycrystalline silicon layers formed by using said second pattern to be tapered and step-shaped; forming a second dielectric film on the n-type polycrystalline silicon layers formed by using said second pattern, then forming contact holes on the second dielectric film at which hot and cold junctions to be formed; forming a metal film layer by sputtering or vacuum evaporation; patterning the metal film layer, then making ohmic contact between the n-type polycrystalline silicon layers and the metal film layers at the contact holes and then, forming a series of thermoelectric elements by connecting each thermoelectric element consisting of a pair of hot and cold junctions in series; forming a third dielectric film on the metal film layers and the second dielectric film, then forming an infrared absorption film on the third dielectric film; and forming a cavity in the back of the single crystalline silicon substrate, then exposing the first dielectric film from the back of the single crystalline silicon substrate.
A tenth aspect of the present invention is to provide a process for producing a thermopile-type infrared sensor comprising the steps of: forming a first dielectric film on both sides of a single crystalline silicon substrate by thermal oxidation, chemical vapor deposition or sputtering; depositing a first polycrystalline silicon layer on the first dielectric film by chemical vapor deposition or sputtering; forming a first n-type polycrystalline silicon layer having resistivity of 1 to 10 mxcexa9xc2x7cm by diffusing impurities into the first polycrystalline silicon layer; patterning the first r-type polycrystalline silicon layer so as to have a first pattern consisting of patterns radially extending in striped shape from a fan-shaped pattern formed between radii r1 and r2 around a chip center up to the vicinity of a periphery of the substrate, patterns radially extending in striped shape toward outside from r, up to the vicinity of the periphery of the substrate, and patterns radially extending in striped shape toward outside from r3 up to the vicinity of the periphery of the substrate; forming a second dielectric film on a plurality of the patterned first n-type polycrystalline silicon layers and on the first dielectric film by chemical vapor deposition, glass coating or sputtering; depositing a second polycrystalline silicon layer on the second dielectric film, then doping the second polycrystalline silicon layer with impurities, thereby forming a second n-type polycrystalline silicon layer having resistivity of 1 to 10 mxcexa9xc2x7cm; patterning the second n-type polycrystalline silicon layer so as to have a second pattern that is the same pattern in shape as the first pattern of the first n-type polycrystalline silicon layers but shifted by half of a pitch toward the circumference of a chip; forming a third dielectric film on the patterned first and second n-type polycrystalline silicon layers, then forming contact holes on the second or third dielectric film at which hot and cold junctions are to be formed; forming a metal film layer on the third dielectric film; patterning the metal film layer, then making ohmic contact between the first and second n-type polycrystalline silicon layers and the metal film layers at the contact holes and then, forming a series of thermoelectric elements by connecting each thermoelectric element consisting of a pair of hot and cold junctions in series; forming a fourth dielectric film on the metal film layers and the third dielectric film, then forming an infrared absorption film on the fourth dielectric film; and forming a cavity in the back of the single crystalline silicon substrate, then exposing the first dielectric film from the back of the single crystalline silicon substrate.
An eleventh aspect of the present invention is to provide a process for producing a thermopile-type infrared sensor comprising the steps of: forming a first dielectric film on both sides of a single crystalline silicon substrate by thermal oxidation, chemical vapor deposition or sputtering; depositing a polycrystalline silicon layer on the first dielectric film by chemical vapor deposition or sputtering; forming a n-type polycrystalline silicon layer having resistivity of 1 to 10 mxcexa9xc2x7cm by diffusing impurities into the polycrystalline silicon layer; patterning the n-type polycrystalline silicon layer so as to have a set of patterns consisting of patterns radially extending in striped shape from a fan-shaped pattern formed between radii r1 and r2 around a chip center up to the vicinity of a periphery of the substrate, patterns radially extending in striped shape toward outside from r2 up to the vicinity of the periphery of the substrate, and patterns radially extending in striped shape toward outside from r3 up to the vicinity of the periphery of the substrate; forming a metal film layer on the first dielectric film and the patterned n-type polycrystalline silicon layers; patterning the metal film layer, then making ohmic contact between the n-type polycrystalline silicon layers and the metal film layers so as to form hot and cold junctions and then, forming a series of thermoelectric elements by connecting each thermoelectric element consisting of a pair of hot and cold junctions in series through the metal film layer; forming a second dielectric film on the first dielectric film, the metal film layers and the patterned n-type polycrystalline silicon layers, then forming an infrared absorption film on the second dielectric film at a chip center; and forming a cavity in the back of the single crystalline silicon substrate by etching, then exposing the first dielectric film from the back of the single crystalline silicon substrate.
Preferably, the infrared absorption film formed on the series of thermoelectric elements consists of one member selected from the group consisting of borosilicate glass, polyimide resin, vinyl resin and acrylic resin.
Preferably, the process further comprises a step of baking the infrared absorption film so as to make a surface thereof have an uneven striped pattern, thereby improving the absorbency of infrared ray.
Preferably, a thickness of the infrared absorption film is 1 to 15 xcexcm and an unevenness of 1 to 10 xcexcm is formed on a surface of the infrared absorption film.
If the thickness of the infrared absorption film is more than 15 xcexcm, the absorption efficiency deteriorates. If the size of unevenness is more than 10 xcexcm, the absorption efficiency deteriorates.
In the aforementioned process for producing a thermopile-type infrared sensor, a temperature of 600 to 700xc2x0 C. is used upon formation of the polycrystalline silicon layer by low-pressure CVD, thereby promoting crystallization of silicon to form the polycrystal, raising the carrier mobility, decreasing the resistivity of the polycrystalline silicon film, increasing the Seebeck coefficient, and improving the S/N ratio.
The hot junctions of the thermoelectric element are placed on the concentric circles, thereby reducing the resistivity of the n-type polycrystalline silicon layers composing each thermoelectric element and providing an infrared sensor having high S/N ratio since a part on the membrane to be heated by the incident infrared ray is circularly distributed around the chip center so as to generate the output voltage effectively. The layout of the n-type polycrystalline silicon layers is formed in such a manner that the hot junctions are placed on the concentric circles having radius r1, r2 and r3 with respect to a chip center in a relation of r1 less than r2 less than r3, thereby preventing concentration of stress from occurring in the membrane due to the formation of the n-type polycrystalline silicon.
The thermopile-type infrared sensor according to the present invention is used in such a manner that the thermopile element (chip) is mounted on a substrate, or is packaged in a package. In the present invention, a metallic case or a ceramic package made of a material such as Al2O3 and AlN is employed as the package, thereby enabling the chip to follow a change of atmospheric temperature, preventing a temperature distribution in the package from occurring, and enabling an accurate temperature compensation at the cold junction to be carried out.